In addition, we verified and emulated the emulating logic by Register Transfer Language. Last of all, we presented the test program and circuit with QUARTURSII.
此外，还用QUARTURSII软件对仿真控制逻辑进行了寄存器传输级的仿真与验证。
The above work is intended to set up an automatic logic synthesis system to translate a register transfer level language descriptions into hardware logic diagrams.
上述工作是为了建立一个将寄存器传输级语言描述翻译成硬件逻辑图的自动逻辑综合系统。
The above work is intended to set up an automatic logic synthesis system to translate a register transfer level language descriptions into hardware logic diagrams.
上述工作是为了建立一个将寄存器传输级语言描述翻译成硬件逻辑图的自动逻辑综合系统。
应用推荐