From the result we can see that the design of each function module of the high speed parallel signal processing system is satisfied with the technical demands.
调试结果表明,高速实时并行信号处理系统的各个功能模块的设计达到了工程设计的技术指标要求。
According to the requirement of technical demands and function realizing, a holistic project about high speed parallel signal processing system which is made up of 4 ADSP21160s is designed.
根据系统的技术指标和功能实现的要求,设计出以4片ADSP21160构成的高速实时并行信号处理系统的整体方案。
Qiapter 2 described the characteristic and performance of the high speed digital signal processor, analyzed and researched three kinds of parallel processing system structure based on DSP.
第2章论述了高速数字信号处理器的特点和性能,对基于DSP的三种并行处理体系结构进行了分析研究。
Multiple DSP parallel digital signal processing system is one of most important method for high-speed DSP system, which find wide application in many different spheres.
多信号处理器并行运算是提高数字信号处理系统运行速度的主要方法之一,具有广阔的应用前景。
In this paper, a signal processing system based on PCI bus is designed and completed, which is made up of four chips of ADSP21060 (SHARC) which the most advanced parallel DSP device.
本论文采用当前国际上较流行的DSP器件ADSP21060 (SHARC),设计和实现了一个基于PCI总线的四片adsp21060并行信号处理板。
Based on one key project, a high-speed digital parallel analyzing system is introduced. The flow of operation of the signal processing program in DSP is defined in detail.
基于某重点工程项目,介绍了一种高速数据并行处理系统,并详细说明了DS P中信号处理程序的操作流程。
This paper presents the design and achievement of a new data structure. The data structure is special for radar signal parallel processing based on a general radar signal processing system.
结合一个通用的雷达信号处理机系统,针对并行雷达信号处理的数据主要为矩阵形式的复数数据的特点,讨论了系统中软件的基本数据结构的定义和实现问题。
Through parallel arithmetic research, a high-parallel-efficiency Radar signal digital pulse compression processing system is designed and optimized, and corresponding experiment result is obtained.
在并行算法研究的基础上,设计并优化了一个高并行效率的雷达信号数字脉冲压缩系统,得出了相应的实验结果。
The processing of signal DSP can not fill with the demand of the flight control system, therefore two chips of TMS320C6713B are used to design the high-speed information processing parallel system.
单片DSP的处理能力无法满足某飞行控制系统的需求,为此采用两片浮点DSP处理器TMS320C6713B构成高速并行信息处理系统。
The processing of signal DSP can not fill with the demand of the flight control system, therefore two chips of TMS320C6713B are used to design the high-speed information processing parallel system.
单片DSP的处理能力无法满足某飞行控制系统的需求,为此采用两片浮点DSP处理器TMS320C6713B构成高速并行信息处理系统。
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