Mainly using interpretive mode, it rounded analysis and research majority function which need realized in decoding module, owing to finiteness of hardware resource in embedded system.
由于嵌入式系统硬件资源的有限性，本论文以解释方式为主全面的分析研究了数控系统中译码模块所要实现的绝大部分功能。
Majority logic decoding is one of the simplest high speed decoding techniques to implement, and can completely be done in parallel. Thus, it is suitable to ultra high speed computer systems.
择多逻辑译码是实现最简单的一种译码方法，具有很高的译码速度且便于并行处理，因此，是一种适合于高速计算机应用的译码技术。
Majority logic decoding is one of the simplest high speed decoding techniques to implement, and can completely be done in parallel. Thus, it is suitable to ultra high speed computer systems.
择多逻辑译码是实现最简单的一种译码方法，具有很高的译码速度且便于并行处理，因此，是一种适合于高速计算机应用的译码技术。
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