In the ALU, we integrate the method of equinoctial node-group and conditional sum adder to design reconfigurable ALU, and join negative logic circuit design design principle into it.
在ALU设计中，将二分结组的思想和条件求和相结合设计了可重组的ALU，并加入负逻辑的数字电路设计思想。
To shorten the distance between theory and practice, improve the ability of flexible application of digital components, logic circuit design is proposed combination of the fifth step.
为缩短理论与实践的距离，提高灵活应用数字元器件的能力，提出了组合逻辑电路设计的第五步。
Optimal design of logic circuit was mainly obtained from circuit itself in our country before.
实现流体逻辑回路设计的优化，过去我国主要是从回路本身上研讨。
The CPU contains thousands of transistors and logic circuits packaged in a very small design known as an integrated circuit (IC).
CPU包含成千上万个晶体管和逻辑电路，它们被封装在一个很小的设计空间模式，称为集成电路(IC)。
The LOP circuit module is described in gate level with VHDL, which has passed the logic simulation and verification. It is applied to the design of floating-point adder.
LOP电路设计采用VHDL语言门级描述，已通过逻辑仿真验证，并在浮点加法器的设计中得到应用。
The article introduces the basic design idea of feedback logic circuit for shift counter and illustrates the basic method of shift counter realization.
文中介绍了移位型计数器中反馈逻辑电路设计的基本思路，举例说明了移位型计数器实现的基本方法。
This paper introduces one way to design scheduling logic circuit with medium-scale integrated counter at the core and based on MSI.
介绍以中规模集成计数器为核心，结合中规模集成组合逻辑器件及少量门电路进行时序逻辑电路设计的方法。
Complex Programmable Logic Device (CPLD) is one of Application Specific Integrated Circuit (ASIC) that has been widely used, especially adapt to design digital system.
复杂可编程逻辑器件(CPLD)是目前应用最为广泛的可编程专用集成电路(ASIC)之一，特别适合于数字系统的设计和开发。
The method to get it can be used to simplify the proving process of some logic equations, as well as some design processes of logical circuit.
利用这种表示反函数的方法，可简化一些逻辑等式的证明过程，并可使一些逻辑电路的设计过程简化。
In this paper, the question of logic function accomplished by data selecter is studied, draw into the method of matrix and probability to preliminary explore of the simplest design of circuit.
本文就利用数据选择器实现逻辑函数的问题进行研究，引入了矩阵和概率的方法，对电路的最简设计作了初步探讨。
An improvement of logic design approach for time-sequence control circuit is presented.
本文提出了逻辑法设计时序控制电路的改进方法。
The functional representations, the algorithmic and design method for describing this circuit structure using multiple-valued logic are also discussed.
同时利用多位逻辑，提出了描述这种电路构造的函数表达式、算法以及设计方法。
The design method of LED big screen scanning circuit is introduced, and the virtues of programmable logic device application on high-speed digital system are presented.
介绍了LED大屏幕扫描电路的设计方法，阐述了可编程逻辑器件在高速数字系统应用中的优点。
This paper introduces the working principle of logic encryption card SLE4442 and its concrete application at spirometer, and also the design of a general IC card interface circuit.
文章介绍了逻辑加密卡sle4442工作原理及其在肺活量计上的具体应用过程，并设计了一种通用的IC卡接口电路。
After the system-level spec and the division of the design hierarchy are comfimed, we start to design the digital logic circuit from the bottom for the pixel machine .
在明确了系统级的总体规划以及设计层次的划分以后，我们从系统的最底层开始进行数字逻辑电路的设计。
The logic and circuit design of a very high speed ECL programmable frequency divider is described.
介绍一种ECL高速程控分频器的逻辑设计、电路设计及研制结果。
The Reduced-Dimension Map can be used as a means to simplify the multiple variable logical function and to design logic circuit.
降维图可作为化简多变量逻辑函数、设计逻辑电路的一种方法。
This paper introduces the application and design methods of a large scale Complex Programable Logic Device (CPLD) in radar signal processing system moving target detection circuit.
介绍了一种大规模复杂可编程逻辑器件(CPLD)在雷达信号处理系统中动目标检测电路的应用及具体实现方法。
This paper review elementary theory for new logic circuit with ROM memory array, and provide design method for two practical array logic circuit.
本文论述用ROM的存贮阵列构成新颖的组合逻辑电路和时序逻辑电路的基本原理，并给出两个实际的阵列式逻辑电路的设计方法。
If don't regard to its effects in high-speed circuit design, the circuit with correct logic function often does not work while debugging.
若在高速电路设计时不考虑其影响，逻辑功能正确的电路在调试时往往会无法正常工作。
The digital logic chip of the invention and the method of design for testing can realize the observation of circuit scanning test by adopting few pins.
本发明的数字逻辑芯片及其可测试设计的方法，能够通过少量管脚实现电路在扫描测试时的可观测。
The key points lies in interface resolve method in hybrid voltage-logic design, A/D sampling circuit, SPI communication port and the protect of the main circuit.
然后分别介绍控制电路和主电路设计原理与思路，重点论述了混合电平逻辑设计中的接口解决方案、A/D采样电路、SPI通讯接口电路及主电路的保护等；
The design is concise and reliable. The sketch map of the logic circuit and the explanation of the main parts are presented.
电路设计简洁可靠，并给出了主要的逻辑电路示意图与主要部件说明；
It also introduces the idea of how to design this interface circuit using the programmable logic chip.
介绍了应用可编辑逻辑器件实现这种接口的设计思路；
By producing evaluating completion signal early and using DSDCVS logic to design computation circuit of reconfigurable cell, a modified control circuit is proposed.
通过提前产生求值完成信号，使用DSDCVS逻辑实现可重构单元的运算电路，改进了异步可重构单元的控制电路。
At the same time, to effectively lower power consumption, it should be noted not only considering LSI as a whole but also improving the design of system structure, its logic and circuit.
同时指出，必须既从LSI整体出发，也从体系结构、逻辑、电路各方面做起才能有效降低系统功耗。
The design is characterized in that when the chip of an EEPROM circuit is powered on, a read-out logic signal is generated through a self-generating circuit of a read-out logic;
该设计具体是，在EEPROM电路芯片加电时，通过一读出逻辑的自产生电路，产生一读出逻辑信号；
A textbook, Analysis and Design of Digital Logic Circuit is compiled, matched with multimedia courseware and the teaching is conducted in multimedia cl...
组织编写了新教材《数字逻辑电路分析与设计》，制作了与教材配套的多媒体课件并用多媒体教室授课。
A textbook, Analysis and Design of Digital Logic Circuit is compiled, matched with multimedia courseware and the teaching is conducted in multimedia cl...
组织编写了新教材《数字逻辑电路分析与设计》，制作了与教材配套的多媒体课件并用多媒体教室授课。
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