We are making significant changes to the JVM instruction architecture.
我们对JVM的指令架构作了重大的改变。
If you don't have a compiler that can produce code to take advantage of the underlying processor architecture and instruction set, then the fastest machines will be useless.
如果您没有可以生成代码来利用底层处理器架构和指令集的编译器，那么最快的机器也将是无用的。
It USES a stack architecture, meaning instruction operands are loaded to an internal stack before they're used.
它使用堆栈体系结构，这意味着在使用指令操作数之前要先将它们装入内部堆栈。
Since the SPU instruction set is not directly related to an existing CPU architecture, a new back end was written for both GCC and binutils.
由于SPU指令集并不与现有的CPU架构直接相关，因此我们为GCC和binutils编写了一个新的后端程序。
The other main type of processor architecture, CISC (the x86 processor being a popular CISC instruction set), allows for memory access in nearly every instruction.
另外一种主要的处理器体系结构CISC (x86处理器就是一种流行的CISC指令集)几乎允许在每条指令中进行内存访问。
Emulation also commonly interprets the instructions of the guest VM (compared to virtualization, where the instruction set architecture of the guests must be the same as the host).
仿真还常常解释来宾vm的指令(与虚拟化相比，此处来宾的指令集架构必须与主机相同)。
The co verification environment consists of an embedded software debugger and an embedded hardware simulator. It adopts instruction set architecture co simulation model.
该协同验证环境由嵌入式软件调试器和嵌入式硬件模拟器组成，其采用了指令集结构的协同模拟模型。
In many revolutions of the computer techniques, the most significant one is the transmission from Complex Instruction Set computer (CISC) to Reduced Instruction Set computer (RISC) architecture.
在计算机技术的许多变革中，最有意义的变革是从复杂指令集(CISC)过渡到精简指令集(RISC)体系结构。
We also present optimization in instruction scheduling and register allocation phase for this ASIP architecture.
并在指令调度和寄存器分配阶段针对这种ASIP处理器的结构做了优化。
There is close relationship between the driven-mode of the, internal instruction and the organization of the Computer architecture.
计算机内部指令的具体驱动形式与计算机体系结构的具体组成是密切相关的。
The chip USES a reconfigurable architecture and very long instruction words (VLIW) to optimize the complex functions.
芯片使用可重构体系结构和超长指令字(VLIW)，优化了高复杂度函数。
The design problem of an embedded RISC architecture in parallel processing of algorithm level, instruction level and process level is discussed in this paper.
本文将从算法级并行处理、指令级并行处理与进程级并行处理等三个方面讨论嵌入式RISC体系结构的设计问题。
In an SISD architecture there is a single instruction cycle; operands are fetched serially into a single processing unit before execution.
在单指令流单数据流结构中，有单一的指令周期，在执行前，单个处理机按序取操作数。
The idea of Computer architecture design has changed profoundly within the forepassed forty years, and the design of instruction format is an important part of architecture design.
计算机体系结构的设计思想在近四十年间发生了深刻的变化，而指令格式的设计是计算机体系结构设计的一个重要环节。
The performance of parallel program is closely related to computer architecture, besides CPU, including system framework, instruction structure and access speed of storage unit.
并行程序的性能与计算机体系结构密切相关，不但取决于CPU，还与系统架构、指令结构、存储部件的存取速度等因素有关。
We put forward a technology named fixed instruction multiple data in order to accelerate the loop, and design a chip-multiprocessors architecture.
为加速循环程序执行，提出了固定指令多数据流计算模型，并设计了一个单芯片阵列处理器体系结构。
According to three aspects: data types, instruction formats, and instruction set, the architecture of an embedded 32 bit RISC microprocessor is introduced in this paper.
本文从数据类型、指令格式与指令集合三个方面介绍一种嵌入式32位RISC微计算机的体系结构。
Parallel computer architecture consists of two classifications: simple instruction stream-multiple data stream (SIMD) and multiple instruction stream-multiple data stream (MIMD).
并行计算机体系结构包括单指令流多数据流(SIMD)和多指令流多数据流(MIMD)两种结构。
Combining with features of ASIP architecture, study on application specific low power optimization technology focusing on instruction set (program code), pipeline and storage.
结合ASIP体系结构特征，以应用特征为指导，针对指令集(程序代码)、流水线和存储部件进行了低功耗优化研究。
This approach starts from the architecture features, that is the earlier instruction set, and works upwards to the applications they can support efficiently adding new instructions or functionalities.
这种方法从结构特性即早期的指令系统开始，自下而上通过增加新指令和功能性而有效地支持新的应用。
Users of this book will gain an understanding of the fundamental concepts of contemporary computer architecture, starting with a Reduced Instruction Set computer (RISC).
这本书的用户将获得一个当代计算机体系结构的基本概念的理解，具有精简指令集计算机(RISC)的开始。
On the base of analyzing and studying the architecture of open CNC system, the overall plan architecture and system instruction design of four-axis EDM CNC system are carried out.
作者在分析和研究开放式数控系统体系结构的基础上，对四轴电火花数控系统进行了总体规化、系统结构和系统命令的设计研究。
For architecture level ones, this paper introduces three kinds of optimization methods, which called operation optimization, instruction optimization and pipeline optimization.
在平台级优化方面，给出了操作优化、指令优化以及流水线优化等三种优化方法。
In a computer with the contrasting von Neumann architecture (and no CPU cache), the CPU can be either reading an instruction or reading/writing data fROM/to the memory.
在基于冯诺依曼架构的计算机中（没有CPU缓存），CPU或者从存储器中读取指令或数据，或者在存储器中写入数据。
The virtual laboratory systems based on this architecture not only can finish OS virtual experiments and instruction well, but also possess good portability and extension.
基于该架构开发的虚拟实验室系统不仅可以很好的支持操作系统实验教学，而且系统具有良好的移植性和扩展性。
In a computer using the Harvard architecture, the CPU can both read an instruction and perform a data memory access at the same time, even without a cache.
在使用哈佛架构的计算机中，即使没有缓存，CPU也可以在读取指令的同时进行数据访问。
On the implementation of debugging system, two types of FPGA-CPU are tested, whose instruction system and architecture are widely different.
此外，设计了专用的编译软件，实现了基于不同指令系统的伪汇编程序编译，提高了调试效率。
This paper introduces the multi - clocks method in 8 - bit complex instruction set MCU system - level architecture.
文章介绍了一种采用多时钟定量系统设计八位复杂指令集微处理器的方法。
The micro-architecture of the X Processor which was designed by us and the integer instruction set of IA-64 are analyzed.
研究了我们自主设计的一款兼容IA-64指令集的微处理器——X处理器的体系结构，深入研究了IA-64指令集中的整数指令；
This set was inspired by ancient Chinese woodmade-architecture art with pattern culture. (The design instruction is subject to Chinese version due to cultural differences.
本主题包创造灵感来源于中国古代木匠艺术，结合古代中国图案文化制作而成。
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