The signal was processed using hardware filter plus software filter and the seam was tracked using threshold area plus proportional control.
信号的处理采用硬件滤波加软件滤波方法，采用门限区加比例控制的方法对焊缝进行跟踪。
Pitot tube kit with pitot tube vinyl tubing filter and hardware.
皮托管套件，带皮托管，乙烯基管套，过滤器和硬件。
With the principle of 16qam, the text puts forward one scheme which adopts FPGA to realize the hardware circuit of 16qam taking shape FIR digital wave filter.
根据16qam的调制原理，提出一种采用现场可编程门阵列(FPGA)实现16 QAM成形的FIR数字滤波器硬件电路的方案。
We have realized the hardware and the software design of DSP high speed data acquisition system. Used the reasonable filter algorithm to increase the system data acquisition precision.
实现了DSP高速数据采集与监控系统的硬件和软件设计，采用了合理的滤波算法提高系统数据采集精度和实时性。
By parallel hardware design structure and digital filter algorithm, the resolution of material flux and the speed of syst.
通过并行的硬件设计结构和数字滤波算法，提高了物料流量的测量精度和系统的响应速度。
This article introduces the basic principle of radar narrow band doppler filters, puts up the designing method of the hardware circuit and analyzes the filter accuracy.
介绍了采用数字方法实现雷达窄带多普勒滤波器组的基本原理，给出了硬件电路的设计方法，并对滤波器精度进行了分析。
Focusing on different types of interference possibly encountered in power signal monitoring, a design method of mathematical morphology filter based on evolvable hardware is proposed.
针对电力信号监测中可能遇到的各种干扰，提出了一种基于进化硬件的自适应电力系统形态滤波器的设计方法。
This design makes high use of hardware resource about FPGA, programming with VHDL language, achieving FIR filter with high sampling level based on FPGA.
该设计对FPGA硬件资源的利用高效合理，用VHDL编程，在FPGA中实现了高采样率的F IR滤波器。
The results of hardware experiment of the sonar adaptive match filter are included, and it shows that the processor has good detecting performance in time domain.
并介绍了这种新处理器的硬件实验结果。表明该处理器有良好的检测能力，是性能优良的时间域声呐信号处理器。
On the basis, we discuss the hardware and software design of power system active power filter and reactive compensation.
在此基础上，讨论了电力系统有源滤波和无功补偿装置的硬件设计及软件开发。
In addition, details of the hardware system filter circuit design, signal acquisition circuit design, display design of Key modules, digital input and output cell design.
此外还详细介绍了硬件系统中的滤波电路设计、信号采集电路设计、显示按键单元设计、开关量输入及输出单元设计等。
Then a design of shunt active power filter based on dual-DSP control has been put forward, with special attention on the control strategy and hardware design.
并提出了一种基于双dsp控制的并联电压型有源电力滤波器的设计方案，重点讨论了系统控制策略和控制系统软硬件设计方面的问题。
The main work of this thesis is to design a FPGA-based adaptive filter implemented by pure hardware.
本文的主要工作是设计基于FPGA的纯硬件实现的自适应滤波器。
This problem can be caused system performance issues, hardware errors, firmware errors, device driver problems, or filter driver intervention in the IO process.
这种问题可能是由于系统性能问题、硬件错误、固件错误、设备驱动程序问题或IO进程中的筛选器驱动程序干预引起的。
In this paper, it discuss the hardware design and software design of the system. In hardware design, it mainly includes peripheral memory, low Butterworth filter, isolated serial port.
在论文中讨论了系统的硬件设计和软件设计：硬件设计包括外围存储器的扩展、巴特沃斯虑波器的设计、防干扰的隔离串口的设计等；
In the basis of determining various strategy, about this proposed parallel hybrid active filter, the DSP hardware and software are designed.
在确定各种方案的基础上，对本文所提出的并联型混合有源滤波器进行了DSP硬件和软件设计。
The appropriate combination of algorithms can effectively promote the quality of filter and simplify the architecture of hardware.
通过合适的算法组合，可以有效地促进滤波质量的改善及硬件实现结构的简化。
Especially three-phase four-wire active power filter hardware has simple structure with only three group switch device.
特别是三相四线制有源电力滤波器硬件结构简单，只有三组开关器件。
This paper discusses the hardware structure and implementation of DopplerfiIter bank in MTD radar using transversal filter.
该文讨论了用横向滤波器实现MTD雷达中多普勒数字滤波器组的硬件结构和实现方法。
USES hierarchical filtering method, this method reduces the filter to request, decrease of the series hardware overhead.
采用分级滤波的方法，这种方法降低了滤波器对级数的要求，减小硬件开销。
By utilizing equivalent transformation and polyphase decomposition of the decimation filter, both hardware cost and operating power of each sub-decimation filter were also reduced.
通过利用抽取滤波器的等价变换和多项分解性质，各滤波器级的硬件电路开销和运行功耗都得到了降低。
According to the characteristic of LEAP architecture, this paper improves the median filter algorithm and optimizes the hardware architecture of matrix multiply algorithm.
根据LEAP结构的特点，对中值滤波算法进行了改进，并对矩阵乘算法的硬件结构进行了优化。
The thesis introduces shunt active power filter system 's hardware and software design with TMS320LF2407 DSP. Hardware and software's structure and function are described in detail.
本文完成了以TMS320LF2407DSP为控制核心的并联型有源电力滤波器系统的硬件和软件设计，对系统的软硬件各部分的结构和功能分别作了详细的阐述。
For hardware design, RC filter, voltage sensitive resistor and photoelectric isolation method are used to eliminate interference signal in sampling channel and A/D channel.
在硬件方面，采用RC滤波器、压敏电阻、光电隔离等措施，消除了采样通道及A/D通道的干扰信号；
The hardware system mainly includes rectifier and filter circuit, regulate voltage and inverter circuit, drive and control circuit, output circuit, protection circuit etc.
电源系统硬件部分主要包括整流滤波电路、调压及逆变电路、驱动及控制电路、输出电路、辅助保护电路等。
The speed of the data is descended before data entering the DMF, so the hardware is greatly reduced. The simulation testifies that the digital matched filter coul...
对将进入数字匹配滤波器的数据进行了降速处理，大大节省了硬件资源。
To the design of hardware, the filter inductance and capacitance of DC-link are the key parts;
其中，滤波电感和中间直流支撑电容的参数设计是硬件电路设计中的重点；
To the design of hardware, the filter inductance and capacitance of DC-link are the key parts;
其中，滤波电感和中间直流支撑电容的参数设计是硬件电路设计中的重点；
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