The ECL OR-AND-gate can simplify a generalized ECL circuits structures, for example, an ECL double-edge-triggered D flip-flop.
作为常规ECL门的补充类型，常可用于简化一般ECL电路结构，例如ECL双边沿D触发器。
Two typical master-slave type D flip-flop of strong hardness to Single Event Upset(SEU) for radiation environment are introduced.
介绍了两种已有的主从型边沿D触发器，它们具有很强的抗单粒子翻转能力。
Two approaches are developed:one based on a D flip-flop loop and the other based on a time-division multiplexing digital-to-analog converter (DAC).
为此提出了基于D触发器环路的相控阵信号发生技术和基于时分复用数模转换器（DAC）的相控阵信号发生技术。
Original conditions: Use D flip-flop (74 LS 74), " and" gate (74 LS 08), " or" gate (74 LS 32), non-gate (74 LS 04), three binary mod 5 counter design.
原始条件：使用D触发器（ 74LS 74 ）、“与”门 （ 74 LS08 ）、“或”门（ 74 LS32 ）、非门 （ 74 LS04 ），设计三位二进制模5计数器。
Through analyzing its work principle, we find the method to raise the speed: use a novel CMOS dynamic D flip-flop and an improved synchronous frequency divider.
分析了双模前置分频器的工作原理，提出了提高其工作速度的方法，包括给出一种新型高速CMOS动态D触发器的设计以及同步分频器的改进。
From function equations of different kinds of flip-flop integrated circuits, we discussed the methods of function change from final product JK of D flip-flop to other kind in use.
从各种时钟触发器的特性方程出发，讨论了实际生产的集成时钟触发器JK型和D型向实用中可能使用的其他各类触发器转换的方法。
The design of ternary D type flip-flop and T type flip - flop has been improved. Thetwo flip-flops have perfect preset functions.
对三值维持阻塞D型和T型触发器的设计进行了改进，使它们具有完善的预置功能。
DT flip- flop is a new type of full- function flip- flop and it can more conveniently be transformed into D flip- flop or T flip- flop.
DT触发器是一种新型的全功能触发器，可以较方便地变换为D触发器和T触发器。
A novel edge-triggered D-flip-flop based on a resonant tunneling diode (RTD) is proposed and used to construct a binary frequency divider.
提出了一种基于共振隧穿二极管的新型边沿触发d触发器并将之用于构成二进制分频器。
A novel edge-triggered D-flip-flop based on a resonant tunneling diode (RTD) is proposed and used to construct a binary frequency divider.
提出了一种基于共振隧穿二极管的新型边沿触发d触发器并将之用于构成二进制分频器。
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