C1E tries to provide more power savings than the traditional C1 state (which only halts the clock signal) by also lowering the voltage and frequency.
同样通过降低电压和频率，C1E尝试比传统C1状态(只会停止时钟信号)提供更大的电能节省。
The high frequency clock allows for a greater sampling rate, which results in higher accuracy and faster signal processing capability .
高频时钟可支持更高的取样率，从而达到更高的精确度和更快的信号处理能力。
A novel all optical scheme for extracting clock pulses with basic frequency from the receiving non uniform OTDM optical signal is proposed.
提出从接收到的光信号脉冲串中提取光基频时钟的方案。
A phase frequency detector compares a reference clock signal to a feedback clock signal to generate pulses in one or more output signals.
相位频率检测器比较基准时钟信号和反馈时钟信号从而在一个或更多个输出信号中生成脉冲。
A frequency comparator compares the frequency of a reference clock with that of an output clock and outputs a frequency comparison signal.
频率比较器比较基准时钟和输出时钟的频率，并输出频率比较信号。
A second reason why clock frequency will no longer be an accurate measure of performance is that distributing the clock's signal to all the different parts of a chip is more difficult that it sounds.
时钟频率不再是性能的精确测量指标的第二个原因是，将时钟信号分配到芯片的不同部分，要比说说困难得多。
The counter is the most commonly used one of the sequential circuits, they not only can be used to count on pulse, still can separate frequency, timing, produce beats pulse and other clock signal etc.
计数器是最常用的时序电路之一，他们不只可以用来指望脉冲，还可以分频，定时，发生跳动的脉搏和其他的时钟信号等。
The high frequency clock allows for a greater sampling rate, which results in higher accuracy and faster signal processing capability.
高频时钟可支持更高的取样率，从而达到更高的精确度和更快的信号处理能力。
The standard frequency in television signals is a signal with high stability and accuracy, controlled by the atomic clock.
电视信号中的标准频率信号是受原子钟控制的高稳定度、高准确度的信号。
The third counter starts counting in the first clock frequency when receiving the enabling signal, and stops counting when the enabling signal stops.
一比较器，接收上述第一计数器及上述第二计数器的计数值，以产生一致能信号输出；
The clock signal is obtained by using a frequency doubler which USES a modified XOR topology, so that the complexity of the system is reduced.
改进异或门拓扑结构实现的二倍频器，结构简单、实用，降低了电路复杂度。
The clock signal is obtained by using a frequency doubler which USES a modified XOR topology, so that the complexity of the system is reduced.
改进异或门拓扑结构实现的二倍频器，结构简单、实用，降低了电路复杂度。
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