In this paper, we present a bit plane-parallel architecture for zero tree coding which is suitable for VLSI implementation.

提出了比特平面并行处理的零树编码结构。

youdao

In this paper, we present a bit plane-parallel architecture for zero tree coding which is suitable for VLSI implementation.

提出了比特平面并行处理的零树编码结构。

youdao