包含运行时变量状态机的复杂业务逻辑模拟。
Complex business logic simulation with runtime variable state machine.
故障模拟被简化为在原始电路上的逻辑模拟。
Fault simulation is reduced to logic simulation on the original circuit.
逻辑模拟是ASIC设计中必不可少的一个环节。
提出模拟推进度的概念，作为对并行逻辑模拟过程中的负载进行准确的衡量标准。
A new concept called simulation advance progress is introduced, which can be a accurate metrics for the load.
随着大规模集成电路的复杂性日益增加，逻辑模拟开始采用并行离散事件模拟技术。
With the rapid growth of complexity of VLSI, more and more logic simulation has adopted parallel discrete event simulation.
在逻辑模拟中用波形作为电路状态的描述工具，通过对波形的计算和检查实现精确的模拟。
Waveforms are used as a tool for describing circuits during logic simulation and accurate simulation is achieved by computing and checking waveforms.
本文在传统的门级逻辑模拟模型和算法的基础上引进了一些新概念，导出了一种新的分析模型和算法。
A new analytical model and some algorithms based on the conventional gate-level simulation are presented in this article.
讨论了数字电路的逻辑级模拟中元件传输延迟模型、元件状态值模型的建立，逻辑模拟的算法以及元件计算的方法。
Discuss the three aspets of the logical-level simulation theory of digital circuits: the construction of delay model and multi-state model, simulation algorithms, and methods of component computation.
此外，为了验证LRU算法和一致性协议，我们在验证平台上做了相关的系统级功能模拟，逻辑模拟结果和设计初衷是吻合的。
On the system verification platform, the function simulation in system level about the pseudo LRU mechanism and MESI protocol is taken, and the results conform to the original intension of our design.
异于目前广泛采用的面向事件的模拟系统，本文提出了基于面向过程的波形字逻辑模拟系统的结构、设计和实现方法，并给出了系统中使用的主要算法。
Difierent from event oriented logic simulation system widely being used, we present a new design method-wave form and some relative algorithms, which are thoroughly process-oriented.
异于目前广泛采用的面向事件的模拟系统，本文提出了基于面向过程的波形字逻辑模拟系统的结构、设计和实现方法，并给出了系统中使用的主要算法。
Difierent from event oriented logic simulation system widely being used, we present a new design method-wave form and some relative algorithms, which are thoroughly process-oriented.
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