LOP电路设计采用VHDL语言门级描述，已通过逻辑仿真验证，并在浮点加法器的设计中得到应用。
The LOP circuit module is described in gate level with VHDL, which has passed the logic simulation and verification. It is applied to the design of floating-point adder.
这种方法在进行性能分析时基于多延迟模型、SPICE和逻辑仿真，可以作为异步数据通路设计和分析的一种有效工具。
This method is based on multi-delay modeling, SPICE and logic simulation. It provides an effective tool to design and analysis asynchronous data-path.
提出了一种建立数字门电路宏模型的方法 ，采用该方法建立的门电路宏模型可以对门电路以及由门电路构成的数字电路进行逻辑仿真 。
The said digital gate circuit macro model can be used to perform a logical simulation for gate circurit and the digital circuit formed by the gate circuit.
本文提出了一种建立数字门电路宏模型的方法，采用该方法建立的门电路宏模型可以对门电路，以及由门电路构成的数字电路进行逻辑仿真。
The said digital gate circuit Marco model can be used to perform a logical simulation for gate circuit and the digital circuit formed by the gate circuit.
对设计方案的制订、模块化设计流程、模拟仿真、逻辑综合、软硬件协同设计等技术从应用的角度进行了分析研究和掌握。
The technology of constitute scheme, modularize design flow, simulate and emulate, logic synthesis, cooperate with software and hardware has been researched and mastered from the point of application.
网络虚拟实验室顺时代潮流而生，它是用软件仿真来模拟已经存在和使用的设备，甚至创造出一些具有实用价值的、虚拟的逻辑仪器设备。
The virtual network Lab is coming as the times require, there are the instruments which simulated by software, it can generate some valuable and virtual Logic instruments as even.
利于在不同的解算逻辑下组件和仿真方案的配置，方便了基于组件的协同开发与仿真。
Configuration of component and simulation scheme in varies solving logic was optimized, and make it was made concurrent developing and simulation convenient based on component.
系统以ARM微处理器和FIFO存储器为核心，利用可编程逻辑器件实现对整个底层数据采集系统的逻辑控制，并给出了时序控制部分的仿真波形。
The system controls the logic of the data acquisition board by programmable logic device (PLD) with the center of the ARM microcontroller and FIFO memory and provides the simulate waveforms.
本文的目的就是利用实物实时仿真技术验证发动机电子控制控制用的逻辑、算法以及确定各种控制参数，模拟发动机外部物理环境来调试、检测发动机性能。
The paper present that validate the logic&arithmetic and confirm the system parameters of engine electronic control system, test the engine performance through simulating the physical circumstance.
仿真结果表明，该算法可以快速得到逻辑保护圈集，优化配置网络空闲资源。
Simulation results show that the set of virtual protection cycles can be obtained fast by using the proposed algorithm, and the spare network resource can be planned in majorization.
这种解算模式，实现了多体动力学解算仿真中，模型与解算逻辑的分离，维护了系统仿真中构件、铰约束、力元等组件的状态一致性。
Separating solving logic from multibody dynamics model, the consistency of status of constraint and force element component was achieved in multibody dynamics system simulation.
经eda软件模拟仿真和FPGA硬件验证，表明该计数器具有正确的逻辑功能，能够正常地应用于数字系统的设计。
It is proved that this type of counter has correct logic function according to EDA simulation and experimental verification with FPGA and can be normally used in the design of digital system.
负责带领整个团队实施芯片的综合、静态时序分析、逻辑一致性分析、后仿真、DFT、ATE、功耗控制。从芯片实现的角度对模块的RTL代码和芯片的RTL代码进行把关。
Lead ASIC frond-end design team to complete Synthesis, STA, Equivelant Check, Post Layout Simulation, DFT, ATE, Power Control. Make sure RTL code is ok for chip implement.
在MATLAB模糊逻辑工具箱中对控制器进行设计，并将模糊控制器与滑跑模型应用于SIMULINK仿真环境，建立整体仿真模型。
Controller was designed in MATLAB fuzzy logic toolbox, and fuzzy controller and taxiing model were used in SIMULINK condition, and the whole simulation model was set up.
仿真实验结果证明了改进演化算法对于实现函数级数字组合逻辑电路的硬件演化是可行的，并且提高了演化算法的演化效率和收敛性能。
The results of simulation prove that the improved algorithms are feasible for evolving the digital combinational logic circuits and improve the evolvable efficiency and convergence performance.
文章提出了一种基于“逻辑拓扑结构”组网的低压电力线载波通信组网方法，描述了建立该结构的算法，并进行了实验室仿真。
This paper introduces a method of constructing a low-voltage PLC network based on logical topological structure, amd discusses its algorithm and simulation.
仿真结果表明本文所提出的基于逻辑BOM的产品配置实现方法能够生成符合客户个性化需求的产品配置。
The simulation results indicated the product configuration conforms to the customer individuality demand can be gained with the method based on the logical BOM.
通过仿真验证fpga逻辑满足成像及数据传输要求，为后续应用奠定了基础。
The logic design of FPGA could meet the demand of imaging and data transmission through simulation and verification. The imaging system will establish reliable foundation for the future application.
大振幅试验，非定常空气动力，空气动力模型，洞壁干扰，动导数仿真，数学模型，模糊逻辑，飞行仿真。
Large amplitude test, Unsteady aerodynamic, Wall influence, dynamic derivative simulating, Mathematic model, Fuzzy logic, Aerodynamicmodeling, Flight simulating.
正常操作培训防误操作闭锁逻辑是仿真培训系统的开发中的一个难点。
The locking logic for avoiding wrong operation in normal operation training is one of the difficulties in the development of the Substation's Simulation and Training System.
所有的功能模块组合起来后，通过EDA工具进行CPU内核的逻辑综合和功能仿真，最后在可编程逻辑器件上实现这个完整的CPU内核。
CPU core was simulated and synthesized by EDA tools after combine all units. In the end, CPU core was implemented in programmable logic device.
仿真结果表明，用户请求高峰期的逐流管理开销远小于连续媒体对象的投递带宽，逻辑层次簇群的管理开销可以忽略不计。
The simulation result shows that the per-stream management overhead is extraordinary smaller than the delivery bandwidth of multimedia object, so the management overhead can be neglected.
对并行离散事件仿真运行信息展开记录与分析有助于发现程序逻辑错误和性能瓶颈，可为开发人员编写高质量仿真程序提供参考。
Recording and analyzing of running information of PDES can help to dig out running errors and performance bottlenecks, which can assist developer code to higher level.
此外，还用QUARTURSII软件对仿真控制逻辑进行了寄存器传输级的仿真与验证。
In addition, we verified and emulated the emulating logic by Register Transfer Language. Last of all, we presented the test program and circuit with QUARTURSII.
科学可视化运用可视化技术在三维数据场上显示科学计算结果，包括逻辑布局的仿真模拟、计算结果数据的后处理和交互处理。
Science visualizing is to display result on 3-d data field using visualizing technology. It consist of simulation of logic layout, the after-treat and alternation-treat of result.
根据特定的仿真需求在运行时动态组合相关服务即可完成空战仿真系统中协调逻辑的绑定，从而提升了系统的敏捷性。
According to the specific simulation task, coordination logics are dynamic bind by interconnecting related services at run time, therefore promoting system agility in ACS.
根据特定的仿真需求在运行时动态组合相关服务即可完成空战仿真系统中协调逻辑的绑定，从而提升了系统的敏捷性。
According to the specific simulation task, coordination logics are dynamic bind by interconnecting related services at run time, therefore promoting system agility in ACS.
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