本文详细介绍了边界扫描测试的原理、结构，讨论了边界扫描测试技术的应用。
The working principle and architecture of BST is introduced in this paper and its applications are discussed.
研究了目前较常用的边界扫描测试技术的原理、结构，并给出了边界扫描技术的应用。
In this paper, the theory and architecture of boundary scan test technology is introduced and researched, then its application is given.
介绍了数据采集的原理和ASIC的基本功能、实现以及JTAG的边界扫描测试技术。
In this paper, the principle of data collection, the basic function and implementation of asic and the technology of JTAG BST are presented.
随着芯片集成度和印刷电路板复杂度的不断提高，边界扫描测试技术在芯片故障检测中的应用越来越广泛。
With the continual improvement of the chip's integration level and complexity of print circuit board, the application of boundary scan test technology becomes wider and wider in testing ICs.
JTAG边界扫描机制是用于在线导通测试的新技术，利用JTAG可以在数分钟内查出复杂插件和系统的全部导通故障。
JTAG Boundary Scan is a new technique for connection test. With the help of JTAG, we can find out all connection faults of a complicated board or system.
本文还讨论了两种智能故障诊断技术，即专家系统智能故障诊断技术和边界扫描测试智能故障诊断技术。
The paper also discusses two intelligent fault diagnostic methods: expert system intelligent fault diagnostic method and boundary-scan technique intelligent fault diagnostic method.
边界扫描技术是一种标准的数字电路测试及可测试性设计方法，它在工业界得到了广泛的应用。
As a standard technique of test and Design-For-Testability for testing the digital printed circuit board, Boundary-Scan technique has obtained widespread application in electronic equipment.
电子产品微型化使自动测试成为必然，而边界扫描技术则使自动测试成为可能。
The miniaturization of electronic products results in automatic testing, which is made possible by boundary scan technology.
IEEE1149标准及其子标准是基于边界扫描的测试技术，它们针对不同的应用环境采用相应的技术标准。
IEEE1149 standard and its. X sub standards are based on boundary scan technique, different standards can be appropriately selected for various of applications.
扫描技术和边界扫描技术是目前可测试性设计的主流技术，可分别用来解决芯片内部与芯片之间的可测试性问题。
Scan technique and boundary scan technique are the main stream technology of current DFT technique. They can solve the internal testable problems and the connection problems between ICs respectively.
本文在对目前主要的可测性设计方法进行研究的基础上，根据所设计CPU的结构特点，采用了边界扫描技术和基于BILBO的内建自测试技术结合的可测性设计方案。
Based on the research of primary DFT method and the structure characteristic of designed CPU, the article combines the boundary scan and Build-In Self-Test based on BILBO to test.
基于IEEE 1149.1标准的边界扫描技术(BST)作为一种标准化的可测性设计方法，弥补了传统测试的缺陷，为复杂的电路互连提供了测试手段。
As a standard DFT method, IEEE 1149.1 boundary-scan technique (BST) provides measures to complex interconnect test and can well make up the shortcoming of traditional test techniques.
文中介绍JTAG边界扫描的概念、技术特点，以及在芯片功能测试、系统诊断、仿真、性能分析和导通测试方面的应用。
This paper focuses on the JTAG ideas and technical characteristics and summarizes the JTAG usage in chip function test, system diagnosis, simulation, performance analysis and conduction test.
边界扫描技术与功能测试的结合，可以扩展边界扫描技术的应用范围，实现了更高的测试覆盖率。
Combining boundary scan with functional test, expanded application of boundary scan and larger testing coverage may be realized.
本文提出将测试领域成熟的边界扫描技术应用在实验系统中，解决配置和验证两大关键问题。
The paper proposes applying boundary-scan technology which is widely used in the domain of test to the computer hardware experiment to resolve the two crucial problems of configuration and test.
硬件系统的规模越来越大，复杂程度越来越高，对其进行测试也越来越困难，边界扫描技术很好地解决了传统测试的不足。
As the scale and complexity of hardware systems increase quickly, it is now a more difficult task to test them. The BST technique can well make up the shortcoming of traditional test techniques.
与此同时，片上系统的测试问题也随之产生，基于边界扫描的内建自测试技术为片上系统的测试提供了新的解决方案。
Meanwhile the testing of SOC become more difficult and complex, Boundary-Scan-based Built-in-Test technology give a new solution.
与此同时，片上系统的测试问题也随之产生，基于边界扫描的内建自测试技术为片上系统的测试提供了新的解决方案。
Meanwhile the testing of SOC become more difficult and complex, Boundary-Scan-based Built-in-Test technology give a new solution.
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