套件包括安装板安装到安装法兰或伺服编码器和硬件，使之与5PY区盛德发电机互换。
Kits include mounting plate and hardware for mounting to flange or servo mount encoders, making them interchangeable with 5PY DC tach generators.
采用高分辨率的增量式光电编码器和相应的硬件接口电路，实现了变磁阻电机转子在定子两个齿之间位移的检测。
Using an optical incremental encoder and hardware interface, the position of the motor rotor between the two teeth of the motor stator is measured.
在硬件抗干扰方面，本课题采用光电隔离的方法成功的对输入光电编码器的信号进行了整形，并隔离了输出负载对电路的影响。
In hardware aspect, this paper use optical-electric insulation method stronger the signal of optical-electric encoder and insulate the infection of out load for main circuit successfully.
阐述了24位光电轴角编码器的结构、工作原理、硬件电路设计处理过程和软件编程特点。
In this paper the structure, operating principle, the design of hardware circuit and the feature software of the 24-bit photoelectric shaft encoder are expounded systematically.
为设计一个用于信道仿真和编码器性能测试的高速高斯随机数发生器，研究了适于硬件实现的高速通用的连续随机变量和随机序列产生法。
To design a gaussian random number generator used for channel simulation and coder performance test, high-speed universal random number and correlated stochastic series generators are studied.
该文阐述了音频压缩编码器的系统构成及基本原理，并且详细地的说明了硬件电路设计思想及相关时序波形的分析。
Not only the system architecture and basic principle are described in this paper, but also the design ideas are proposed and timing sequence of hardware is analyzed in detail.
输送机驱动马达应每VFD电气规格与编码器，齿轮箱，联轴节，安装硬件的完整驱动。
The conveyor motor shall be driven by a VFD per the Electrical Specification complete with encoder, gearbox, couplings, and mounting hardware.
着重介绍了使用旋转编码器与PLC相结合来提高定尺长度精度的方法。给出了PLC控制系统的硬件接线图及程序设计。
Meanwhile, in combination of the rotary coder and PLC is emphatically introduced, the hardware wiring diagram and the program design of the system are also given.
提出了一种基于PCI总线的MPEG - 2编码器的实现方案，给出了硬件实现的详细说明。
In this paper, the scheme of an MPEG-2 encoder based on PCI bus is brought forward, and its hardware implementation is described in detail.
该编码器和译码器适合用于高速率的现代通信技术，特别是硬件资源较丰富的环境。
The encoder and decoder is optimized for high-speed modern communications technology, particularly in the higher hardware resources environment.
同时，在JPEG 2000中基于子带、码块和比特平面的编码都可以并行实现。 因此，MQ编码器的效率就成了JPEG 2000硬件高速实现需要解决的关键问题。
The MQ coder is adopted in JPEG2000. In EBCOT algorithm, the tiles, code-block, bit-plane all can be implemented using parallel structure.
若采用CPLD设计硬件电路，可以实现高速度、高精度增量型编码器的数据采集。
If the hardware circuit is designed by CPLD, the data acquisition of high speed and high precision incremental encoder could be obtained.
在硬件设计方面，完成了阅读器主电路及功能模块的设计，特别是对D类功率放大器、编码器和电感线圈的设计理论和方法作了详细介绍。
In the design of hardware, the paper details in introducing the reader circuit and function module, especially the theory and method of design in D-type power amplifier, Manchester code and coil.
简要介绍NTT电子制造公司的SC 3000e编码模块，以该编码模块为基础，设计了高清mpeg - 2硬件实时编码器系统的实现方案及在开发系统上的具体实现过程。
SC3000E encoding module of NTT Electronic Corporation is briefly introduced and a high-definition MPEG-2 hard-ware real-time encoding system based on this module is designed and implemented.
文章阐述了利用低成本单片机系统提高低分辨力的磁性编码器的分辨率的硬件电路和软件设计方案；
This paper introduces a low-cost system based on single-chip computer. which was used for improving the resolution of the low resolve power magnetic encoder.
详细介绍了单圈绝对式编码器的基本原理和理论依据，具体给出了系统硬件设计方法。
In this paper, the fundamental principle and theoretical basis of the single_ring absolute encoder are specified, and the system hardware design is illustrated. The experimental results show that...
详细介绍了单圈绝对式编码器的基本原理和理论依据，具体给出了系统硬件设计方法。
In this paper, the fundamental principle and theoretical basis of the single_ring absolute encoder are specified, and the system hardware design is illustrated. The experimental results show that...
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