着重阐述逻辑电平转换、控制逻辑的结构设计及其工作方式。
The structural design of logic level shift and control logic circuits are dealt with in particular.
并对存储器的电平转换以及时钟模块的配置进行了详细的分析。
Otherwise, the electric level transform of memorizer and the configuration of clock module are analyzed in detail.
第一开关电路耦 接至电平转换器，并在第三晶体管导通时，关闭第四晶体管。
The first switch circuit is coupled to the electrical level translator and turns off the fourth transistor when the third transistor is turned on.
而第二开关电路耦接至电平转换器，并在第一晶体管导通时，关闭第二晶体管。
While the second switch circuit is coupled to the electrical level translator and turns off the second transistor when the first transistor is turned on.
电平转换电路和比例放大电路的性能符合设计指标，文中给出了测试曲线和数据。
The testing result of voltage transfer circuit and proportional amplifying circuit is in consistence with the simulation result.
主要介绍了RS - 2 32C串口的一些应用技术：电平转换、低功耗转换、系统实际应用。
Some techniques in application of RS-232C, such as voltage level transfer, transfer with low dissipation, and application of system, are described in this article.
其它特性包括：集成缓冲用来驱动基准电压，以及集成完全差动放大器用来缓冲调制器输入并进行电平转换。
Other features include an integrated buffer to drive the reference as well as a fully differential amplifier to buffer and level shift the input to the modulator.
对于硬件接口电路中常用的一些方法进行了简要的比较，并介绍了电平转换芯片MAX232及其应用方法。
It gives comparison among some methods which are often adopted in the interfacing circuit, and introduces a chip MAX232 of level translation and its application method in detail.
硬件部分的设计主要是对蓝牙模块应用电路的电源模块、RS232电平转换模块、蓝牙模块分别进行分析设计。
Hardware design of the main parts of the Bluetooth module is divided the application circuit power module, RS232 level translation module, Bluetooth module.
介绍了IRIG-B码对时的概念、IRIG-B码对时模块的组成，其组成部分包括微处理器、电平转换器件、光耦隔离器。
The paper introduces the time synchronization conception of the IRIG-B format code and its module constructions which include microprocessor, level converter and optically coupled isolator.
本论文介绍了采取电平转换芯片MAX232实现PC机与单片机之间的串行通信的方法，即分布式实时通告系统的设计。
This dissertation introduces a method of serial communication using level conversion chip MAX232 between PC and monolithic processor, this is design of Distributed Real-time circular system.
本文介绍了该系统中数据传输网络的组成、工作原理及数据传输机制，特别是设计独特的RS-232与RS-485之间的无源电平转换接口模块。
The paper introduces the structure, theory and mechanism of data communication net in this system, especially RS232/RS485 passive level conversion module.
“满刻度”是指转换器可能达到“数字过载”之前的最大可编码模拟信号电平。
"Full scale" refers to the converter could reach the "digital overload" maximum before the encoding analog signal levels.
光扭矩传感器的输出信号在进行光电转换过程中，由于温度影响，造成了直流电平漂移误差，影响系统的测量精度。
During the photoelectric conversion process of output signal from optical torque sensor, DC level drift error induced by temperature influence will affect the measuring accuracy of the system.
只要控制接收器中超辐射的光电转换电平，就能控制打开Q开关时的反转粒子数，也就能稳定输出的巨脉冲激光。
So we can control the population which can trigger the Q-switch by controlling the superradiant convert electrical level in the superradiant detector and then the laser output can be stabilized.
另一方面，为了兼容其他那些工作输入信号电压不为0的器件，如模数-数模转换器，信号电平也许要做平移。
On the other hand, the signal may require level shifting in order to be compatible with the input of other devices (such as ADCs) that are not designed to operate at 0v input.
对于这些应用，设计人员集中于电路能够连转换最小可用电压电平到有用功率。
For these applications, designers focus on circuits able to convert even the smallest available voltage levels to useful power.
对于大功率的GTO逆变器，提出了一种零电压转换(ZVS)的三电平辅助谐振变换极逆变器(ARCPI)。
A zero-voltage-switching (ZVS) three-level auxiliary resonant commutated pole inverter (ARCPI) is presented for high power GTO ones.
这种水表终端采用接触式电刷将水表字轮各码位转换为电平信号，并将检测的电平信号并行输入单片机。
This kind of water meter adopts touching electric brush to convert code position of digital code wheel of water meter into voltage signal which will be input to micro-computer in parallel.
它能使SC1串行接口电平与标准的RS 232接口电平彼此转换。
It can make levels of SC 1 serial port and RS232 one to inter transform.
在一些实施例中，所述电平位移电路包括锁存经转换的输出信号的电平位移锁存器(208)。
In some embodiments, the level shifting circuit includes a level shifting latch (208) that latches a translated output signal.
设计结构主要分为数字部分和模拟部分，中间用电平位移模块进行电平的转换。
The design can be mainly divided into two parts which is the digital part and the analog part separately.
逻辑信号从高电平到低电平的转换被称为下降沿。
A transition in a logic signal from a logic high to a logic low is referred to as a falling edge.
逻辑信号从高电平到低电平的转换被称为下降沿。
A transition in a logic signal from a logic high to a logic low is referred to as a falling edge.
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