其后面是4040处理器(1974发布)，其具有扩展指令集、程序内存、寄存器集和堆栈。
Its successor was the 4040 processor (released in 1974), which had an expanded instruction set, program memory, register set, and stack.
即使一个程序只包括一个在单一处理器上运行的单线程，一个同步的方法调用仍要比非同步的方法调用慢。
Even when a program contains only a single thread running on a single processor, a synchronized method call is still slower than an unsynchronized method call.
或者更糟糕，程序在您的机器上100%地正确运行，而在您客户的四处理器服务器上正确运行的概率却是零。
Or worse, a program that works 100% of the time on your machine but 0% of the time on your client's quad-processor server.
所有POWER 6处理器系统都支持这种模式。
源服务器和目标服务器必须至少位于基于POWER 6处理器架构的系统中。
The source and destination servers must be at least POWER6 processor architecture-based systems.
作为J2ME目标的微型设备具有16位或32位处理器和总量不少于大约128KB的存储器。
The microdevices that J2ME targets have 16 - or 32-bit processors and a minimum total memory footprint of approximately 128 KB.
支持此编程模型时，JSR- 181处理器必须在实现文件中描述的注释与WSDL中定义的契约不匹配时提供反馈信息。
When this programming model is supported, the JSR-181 processor must provide feedback when the annotations described in the implementation file do not match the contract defined within the WSDL.
从POWER 4处理器开始，AIX可以支持最大16MB的页面大小。
Starting with the POWER4 processor, AIX supported up to 16mb pages sizes.
如示例所示，实时任务接收到单一处理器的最大份额且只能调用61次。
As shown, the real-time task receives the lion's share of the single processor and is invoked only 61 times.
目前的构建需要64位处理器来编译和构建包，但编译后的包可以运行在32位与64位的平台上。
The current build requires a 64-bit processor to compile and build the package, although the compiled result will run on either a 64-bit or 32-bit platform.
然后是设计中的黑马：基于苹果A4处理器或者A 4变体的产品。
Then there's the design dark horse: a product based on the Apple A4 processor, or a variant thereof.
提供了基于POWER 6处理器的服务器的IBMi应用的性能支持。
Deliver the performance required for IBM I applications with POWER6 processor-based servers.
例如，AIX7仍然支持老式硬件，包括基于POWER 4处理器的服务器。
For example, AIX 7 will also support older hardware, including POWER4 processor-based servers.
由于POWER5和POWER 6架构能够扩展到64位处理器，大部分应用程序都得益于2.6内核级别的NUMA支持。
With both the POWER5 and POWER6 architectures being scalable to 64 processors, most applications will benefit from the 2.6 kernel level NUMA support.
在x86处理器上，那个语句可能会被编译为。
在具有16位和32位处理器的设备上，性能有效。
Performance is effective on devices with 16 - and 32-bit processors.
但它必须能够运行在市场上的每个G3处理器上，往往只有不足8MB的运行空间。
But it had to run on every G3 processor Apple had on the market, and it had to run in as little as 8 MB of video memory.
1ghz或更快的32位或64位处理器。
现在JBossWSJSR- 181处理器应对您的Web服务进行部署。
Your web service should now be deployed by the JBossWS JSR-181 processor.
ApacheBe ehive项目正在进行通用JSR- 181处理器通用实现方面的工作。
The Apache Beehive project is working on a generalized implementation of a JSR-181 processor.
用户期待iphone5将会采用更快的A5处理器。
The iPhone 5 is expected to come with a faster, A5 processor.
从POWER 6处理器开始，支持使用键来实现硬件存储保护。
Hardware storage protection with keys is supported beginning with POWER6 processors. The hardware architecture added two new items.
在其他平台上有等效的指令，例如Motorola MC 68030处理器的compareandswap (CAS)指令有相似的语义。
Equivalent instructions are available on other platforms-for example, the Motorola MC68030 processor has an instruction named compare and swap (CAS) that has similar semantics.
r PM的名称表明这是针对i386处理器的wgetversion 1.12。
The name of the RPM reflects that this is wget version 1.12 for the i386 processor.
CPU—英特尔酷睿i5处理器是活的可靠表现的首选，但是i3处理器表现也还可圈可点。如果现金吃紧，不妨考虑i3。
CPU -intel's Core i5 processor is the standard for solid performance, but Intel's Core i3 processors can work well, too, if you need to save a little cash.
由于IBM认为Intel 8086和Motorola MC 68000这两种16位处理器都太强大，所以选用Intel的8 - 16位8088处理器。
IBM selected Intel's 8-to-16-bit 8088 processor, because it thought both the Intel 8086 and Motorola MC68000 16-bit processors were too powerful.
在8处理器主机上，可以看到，当所有处理器用于处理任务时，有两个处理器性能最优。
On an 8 processor host, the best performance was observed with two two processor VMs when all processors are used for jobs.
此外，虽然使用早期处理器兼容模式的逻辑分区能够运行在POWER 7服务器上，但是POWER 7处理器不能够模拟POWER 6或POWER 5处理器的所有特性。
Also, although logical partitions that use the earlier processor compatibility modes can run on POWER7 servers, a POWER7 processor does not emulate all features of a POWER6 or a POWER5 processor.
“二进制兼容性概述”中的最后一个示例涉及到了在不同的处理器类型中运行二进制代码——POWER 4处理器和POWER 5处理器。
The last example under "Overview of binary compatibility" involved running a binary on two different processor types — a POWER4 processor and a POWER5 processor.
POWER 6处理器有两个能够在每个处理器周期发出多条指令的硬件指令线程，从而改善了性能。
The POWER6 chip has two hardware instruction threads that are both capable of issuing multiple instructions per cycle, which causes a boost in performance.
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