单纯的浮点加法和乘法已经远远不能满足数字计算的需求。
The computational demand goes beyond fast floating-point addition and multiplication.
该“产生式规则”简单而易以实现，而且不增加浮点加法器的延迟。
The product rule is very simple and easy to implement, and it doesn't increase additional delay.
主要研究方向是优化浮点加法器结构，减小浮点加法运算的延迟，优化电路结构。
The main research area is the structure optimization of floating-point adder, which is intent to minimize the delay of floating-point addition and optimize the circuit structure.
主要研究方向是优化浮点加法器结构，减小浮点加法运算的延迟，优化电路结构。
The main research area is the structure optimization of floating-point adder , which is intent to minimize the delay of floating-point addition and optimize the circuit structure.
着重研究了整数加法器、移位器、先导零预测逻辑等浮点加法器关键部件的优化设计。
Integer adder, shifter and LZA these key parts are mainly studied and optimally designed.
浮点加法器是构成CPU的基本部件之一，其性能优劣将直接影响CPU浮点处理能力。
Floating-point adder is one of the basic parts of CPU. Its performance has a direct effect on CPU floating-point processing capacity.
然而，如果传递两个vectorfloat作为参数，就会生成fa(浮点加法)指令。
However, if given two vector floats as parameters, it will generate the fa (float add) instruction.
LOP电路设计采用VHDL语言门级描述，已通过逻辑仿真验证，并在浮点加法器的设计中得到应用。
The LOP circuit module is described in gate level with VHDL, which has passed the logic simulation and verification. It is applied to the design of floating-point adder.
浮点加法器是协处理器的核心运算部件，是实现浮点指令各种运算的基础，其设计优化是提高浮点运算速度和精度的关键途径。
High-Speed Floating-point Adder is a critical part in the coprocessor, which is attached to the computing basis of floating-point instructions.
任何浮点操作，例如加法和乘法，都可以通过几个步骤来实现。
Any floating-point operation like addition or multiplication is achieved in a few discrete steps.
运用流水线技术对单精度浮点乘法和加法运算单元进行了优化设计。
For optimizing floating-point units, a design based on pipeline techniques is described in this paper.
传统的浮点乘加部件采用“乘法-加法-规格化-舍入”的结构。
The structure of traditional FMAF is "multiply - add - normalize - round".
浮点数加法运算是浮点运算中使用频率最高的运算。
The Floating-point addition is the highest frequent operator.
浮点数加法运算是浮点运算中使用频率最高的运算。
The Floating-point addition is the highest frequent operator.
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