在栅极电介质层上形成界面层。

An interface layer is formed on the gate dielectric layer.

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实施例中，本方法包括在半导体衬底上形成栅极电介质层。

In an embodiment, the method includes forming a gate dielectric layer on a semiconductor substrate.

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现在研究者正在努力优化器件结构、石墨烯性质和栅极电介质以提高晶体管性能。

The team is now busy working on improving the performance of the transistors by optimizing device structure, graphene quality and the gate dielectric.

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所述至少一个非半导体单层被定位于相对于所述沟道和所述栅极电介质之间的界面大约4- 100个单层的深度处。

The at least one non-semiconductor monolayer may be positioned at depth of about 4-100 monolayers relative to the interface between the channel and the gate dielectric.

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牺牲栅电极间隔物设置在所述栅极电介质和所述栅电极的侧壁上，在所述衬底上蚀刻空腔，并且空腔在牺牲栅电极间隔物下方延伸。

Sacrificial gate spacers are disposed on the sidewalls of the gate dielectric and gate electrode. Cavities are etched into the substrate extending under the sacrificial gate spacers.

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特定来说，在非易失性存储器装置经历许多编程循环时，电荷变为俘获在浮动栅极与沟道区之间的绝缘体或电介质中。

In particular, as a non-volatile memory device undergoes many programming cycles, charge becomes trapped in the insulator or dielectric between the floating gate and the channel region.

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栅电介质层和栅极形成在鳍部的顶表面上、相对的侧壁上和鳍部内的凹陷的底部上和相对的侧壁上。

A gate dielectric layer and a gate electrode are formed on the top surface, the opposing sidewalls of the fin and on the bottom and on the opposing sidewalls of the recess in the fin.

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栅电介质层和栅极形成在鳍部的顶表面上、相对的侧壁上和鳍部内的凹陷的底部上和相对的侧壁上。

A gate dielectric layer and a gate electrode are formed on the top surface, the opposing sidewalls of the fin and on the bottom and on the opposing sidewalls of the recess in the fin.

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