译码单元由指令缓存器和指令译码器构成，针对12位的指令代码翻译成16位控制信号，传送给处理器内部各个部件，用以保证各部件正常工作。
The encoding unit, composed of instruction buffer and command encoder, translates the 12-bit command code to 16-bit control signal, and ensures each part of the system to work steadily.
I -cache失效(处理器无法从指令缓存获取下一个指令)。
I-cache miss (Processor cannot get the next instruction from instruction cache).
如果数据或指令没有出现在高速缓存中，或者如果高速缓存线路无效的时候，CPU通过从主存储器中读数据来更新它的高速缓存。
If the data or instruction is not present in the cache, or if the cache line is invalidated, the CPU updates its cache by reading the data from the main memory.
在某些情况下，服务器或客户机可能需要为HTTP缓存提供显式指令。
In some cases, a server or client might need to provide explicit directives to the HTTP caches.
PPE用载入和存储指令访问主存储器(有效地址空间)，可以在主存储器与内容可以缓存的私有寄存器文件之间移动数据。
The PPE accesses main storage (the effective-address space) with load and store instructions that move data between main storage and a private register file, the contents of which may be cached.
在现代处理器上由于广泛使用指令缓存，小代码通常会运行得更快。
On modern processors smaller code usually runs faster due to better use of the instruction cache.
在基于冯诺依曼架构的计算机中（没有CPU缓存），CPU或者从存储器中读取指令或数据，或者在存储器中写入数据。
In a computer with the contrasting von Neumann architecture (and no CPU cache), the CPU can be either reading an instruction or reading/writing data fROM/to the memory.
在任何情况下指令存储器所对应的地址空间都是可缓存的。
The address space corresponding to instruction memory is always indicated cacheable, which is correct in function.
在任何情况下指令存储器所对应的地址空间都是可缓存的。
The address space corresponding to instruction memory is always indicated cacheable, which is correct in function.
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