提出了电路的并行拓扑分析法。
The parallel topological analysis for circuits is presented in this paper.
本文提出了互连网络拓扑等价的图分析法和描述网络逻辑名结构的逻辑名矩阵。
The graph analysis method for topological equivalence of interconnection networks, and the concept of logical name matrice for describing logical name structure are proposed.
本文提出了互连网络拓扑等价的图分析法和描述网络逻辑名结构的逻辑名矩阵。
The graph analysis method for topological equivalence of interconnection networks, and the concept of logical name matrice for describing logical name structure are proposed.
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