该扫描路径上的延迟减少对外部缓冲器的需求，进而在集成电路扫描测试时避免保持时间违反。

The delay in the scan path reduces the need for external buffers to avoid hold-time violations during scan testing of integrated circuits.

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该扫描路径上的延迟减少对外部缓冲器的需求，进而在集成电路扫描测试时避免保持时间违反。

The delay in the scan path reduces the need for external buffers to avoid hold-time violations during scan testing of integrated circuits.

youdao