这是因为进程执行现在需要跨总线协调,以一半的芯片时钟频率进行处理。
This is because process execution now needs to be coordinated across the bus, which operates at half the clock frequency of the chip.
一旦选择了时钟源,可以有多种控制最终总线频率的选择。
Once you select the timing source, you have many options for controlling the final bus frequency.
总线时钟与处理器内核时钟频率不同,因此总线部件与处理器内核间的接口信号需要进行时钟域转换。
The bus and the processor core often run in different clock frequencies, so their interface signals belong to different clock domains.
总线时钟与处理器内核时钟频率不同,因此总线部件与处理器内核间的接口信号需要进行时钟域转换。
The bus and the processor core often run in different clock frequencies, so their interface signals belong to different clock domains.
应用推荐