针对电厂一台实际锅炉，得出了锅炉水位动态响应的延迟时间与伐门开启时间，以及流过伐门流量之间的关系。
The relationship between delay time of the boiler response, the opening time of the valve and the flow through the valve for an actual boiler is obtained.
改进了互补逻辑—交替互补逻辑(CL - ACL)结构，并做了考虑门级延迟的模拟验证。
Then, CL-ACL structure is improved, simulation and verification under real gate delay is done.
目的研究肝小血管瘤(SHHE)在螺旋CT多期(动脉期、门脉期和延迟期)增强扫描中的表现，提高诊断水平。
Objective To investigate the features of the enhancement of small hepatic hemangioma (SHHE) at multiphase spiral ct scanning and improve the diagnosis.
本文提出了一种用我国首创的DY L集成线性“与或”门设计成的模拟延迟线。
AN artificial delay line which was designed by using the DYL integrated linear AND-OR gate created first in China were proposed.
该电路建立在一个简单的异或非逻辑门和延迟线的基础上，通过抽样调查异或非门的输出来检测电路的错误点，引入的多余面积很少。
The circuit is based on a simple XNOR logic gate and delay lines to sample the output of the XNOR gate, so very little area is introduced.
同时介绍了该分频器各级门的动态特性以及内部用三态门控制结构的优点，给出了平均延迟时间的设计结果，该设计已应用于高频时钟芯片的大批量生产中。
The dynamic performance of the gates and the advantages of internal structure of tri-state gate control are also presented. Results of the averaged time delay design are given. which have bee...
同时介绍了该分频器各级门的动态特性以及内部用三态门控制结构的优点，给出了平均延迟时间的设计结果，该设计已应用于高频时钟芯片的大批量生产中。
The dynamic performance of the gates and the advantages of internal structure of tri-state gate control are also presented. Results of the averaged time delay design are given. which have bee...
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