每个操作都是并行地针对多个数据元素进行，这些数据分别存储在一些128位的寄存器中。
Every operation works on multiple data elements in parallel, stored in 128-bit registers.
移位寄存器是一种能以串行和并行方式输入信息的装置。
The shift register is a device in which information may enter sequentially or in parallel.
本文简要地介绍量子计算的一些基本概念：量子纠缠、量子位、量子寄存器、量子并行计算和量子纠错。
In this paper we briefly introduce some basic concepts of quantum computing which include quantum entanglement, quantum bit, quantum register, quantum parallel computing and quantum error correction.
新一代面向密集计算的高性能处理器普遍采用分布式寄存器文件来支撑ALU阵列，并通过VLIW开发指令级并行。
Newly-emerging high performance processors for intensive computing generally use distributed register files to support ALU array and to explore instruction level parallelism(ILP) by VLIW.
PC并行打印口与多台下位单片机的通讯，将接口分成数据、状态、控制三组，由其寄存器分别控制。
For communication among parallel print port of PC and multiple single-chips, interface is divided into data, state and control groups respectively controlled by each register.
研究了串行输入，并行输出单向移位寄存器的功能。
The function of the single-direction shift register which is serial input and parallel output is mainly studied.
输出数据通过串行或并行端口从输出寄存器中存取，这可实现与现代微控制器和数字信号处理器的轻松、高速接口。
The output data is accessed from the output register through a serial or parallel port. This offers easy, high speed interfacing to modern microcontrollers and digital signal processors.
触发器的并行加载可以是同步的(即在时钟脉冲到达时发生)或异步的(不依赖于时钟)，这取决于移位寄存器的设计。
The parallel loading of the flip-flop can be synchronous (i. e., occurs with the clock pulse) or asynchronous (independent of the clock pulse) depending on the design of the shift register.
但该技术在提高指令并行性的同时也增加了寄存器压力，而寄存器溢出技术正是解决寄存器压力的有效方法。
However, this technique also increases the register pressure while it takes advantage of the instruction-level parallelism, and the register spilling is an effective approach to solve this problem.
并行数寄存于移位寄存器。
MAI管理设备控制器内的所有状态寄存器，并且通过8位并行数据线与设备端mcu进行数据交换。
MAI, which manages all the control status registers, exchange data with MCU through 8-bit data bus.
在幸存路径管理部分采用了两路并行回溯的设计方法，与寄存器交换法相比，回溯算法更适用于FPGA开发设计。
In the survivor management, two parallel trace-back module is designed, trace-back algorithm is better than register-change algorithm for designing on FPGA.
在串行CRC编码实现中，移位寄存器主要完成将并行输人数据转换成串行输出数据的功能，是整个设计的重要组成部分。
The shift register's function is completion of parallel data input into serial data output. The design of shift register is an important part in the realization of CRC code.
最后，”一丝不苟”VI使用大量移位寄存器在一个循环内反复传递数据，在多个并行循环间使用队列传递数据。
Finally, Meticulous VI makes extensive use of shift registers for passing data between loop iterations, and queues for passing data between parallel loops.
最后，”一丝不苟”VI使用大量移位寄存器在一个循环内反复传递数据，在多个并行循环间使用队列传递数据。
Finally, Meticulous VI makes extensive use of shift registers for passing data between loop iterations, and queues for passing data between parallel loops.
应用推荐