使用其他模式无法进行的内存访问(地址可以通过其他方式进行计算，并存储到寄存器中，然后就使用这个值来访问内存)。
Any memory access that is not available by other modes (the address can be calculated by other means and stored in the register, which is then used for the access).
如果没有提供地址，那么它采用当前寄存器来回溯堆栈。
If no address is provided, it takes the current registers to traceback the stack.
RMO 寄存器设计用于每个分区，并且可以帮助每个分区引用地址零、以及内存中有效的且唯一的地址。
The RMO register is designed for each partition and is intended to facilitate each partition to reference address zero and yet a valid and unique address in the memory.
你也可以设置断点并检查特定内存地址或寄存器的内容。
You can also set breakpoints and examine the contents of specific memory locations and registers.
针对有效值限制测试由前面的寄存器地址请求返回的值。
Test the values returned by the preceding register address request against valid value limits.
在寄存器加上一个常量是为了计算用于加载或存储的地址。
The constant gets added to the register to compute the address to use for loading or storing.
索引寄存器会与某个指定的地址相加，结果用作访问内存时使用的地址。
The index register is added to the specified address, and the result is used as the address for the memory access.
所使用的内存地址是通过将这两个寄存器加在一起来确定的。
The memory address used is determined by adding the two registers together.
所以该指令会将链接寄存器(存有返回地址)存储到调用函数堆栈框架的恰当位置。
So this instruction stores the link register (which holds the return address) into the proper location in the calling function's stack frame.
它包括两个部分：一个内存地址以及一个索引寄存器。
PPE用载入和存储指令访问主存储器(有效地址空间)，可以在主存储器与内容可以缓存的私有寄存器文件之间移动数据。
The PPE accesses main storage (the effective-address space) with load and store instructions that move data between main storage and a private register file, the contents of which may be cached.
第一个指令负责加载，第二个指令旋转此值以便所请求的地址位于寄存器的开始。
The first instruction does the load and the second instruction rotates the value so that the requested address is at the beginning of the register.
这将总会是它为了将指定地址移到寄存器的开始所需向左移位的字节数。
This will always be the number of bytes it needs to shift left to move the address specified to the beginning of the register.
在SIGILL的情况中，DAR可能不会提供任何有用的数据，因为这个寄存器在SIGSEGV的情况中就被用来存放故障地址。
In the case of SIGILL, the DAR might not provide useful data, because this register is used to store the fault address in the case of SIGSEGV.
地址总线被处理器用来选择在特定外设中的存储器地址或寄存器。
The address bus is used by the processor to select aspecific memory location or register within a particular peripheral.
寄存器可以存放整个结构的地址，数字部分可以根据所访问的结构成员进行修改。
The register can hold the address of the whole struct, and the numeric portion can be modified depending on the structure member to be accessed.
然后，假设这个结构体本身的地址在一个名为X 的寄存器中。
Then, let's say that the address of the struct itself is in a register called register X.
在这种情况下，有效地址总是分为两个32位的寄存器；高位寄存器是可选的，如果没有指定，就会被当作零进行处理。
The effective address is, under the hood, always split into a pair of 32-bit registers; the high-order register is optional and if it's not specified, it is treated as zero.
在两种模式下，有效地址计算将使用所有64位相关寄存器(GPR、LR、CTR等)并生成64位结果。
In both modes, effective address computations use all 64 bits of the relevant registers (GPRs, LRs, CTRs, etc.) and produce a 64-bit result.
这里有三项数据：一个是基地址，第二个是索引寄存器，第三个是乘数。
Here, there are three entities: one is the base address, the second is the index register, and the third is the multiplier.
寄存器地址请求(0B)。
dar(数据地址寄存器)包含处理器尝试访问的地址，这一行为将引发页面错误。
The dar (Data address Register) contains the address that the processor tried to access, which then caused a page fault.
iar -指令地址寄存器。
一个寄存器测试范围中的结束Modbus寄存器地址。
The ending Modbus register address in a register test range.
一个寄存器测试范围中的起始 Modbus 寄存器地址。
The beginning Modbus register address in a register test range.
在调试信号时，需要查看的一些重要寄存器包括GPR、指令指针(NIP)、机器状态寄存器(MSR)、Trap、数据地址寄存器(DAR)等等。
Important registers to look for when debugging through signals are the GPRs, instruction pointer (NIP), machine state register (MSR), trap, data address register (DAR), and so on.
下面的输出显示了kprobe 的地址以及 eflags寄存器的内容
The following output shows kprobe's address, and the contents of the eflags registers
第一个操作数是目标寄存器，第二个操作数是要加载的D -Form地址。
"The first operand is the destination register and the second is the D-Form address to load."
表1列出了一些流行的架构以及它们的寄存器和物理地址大小。
Table 1 lists some popular architectures with their register and physical address sizes.
表1列出了一些流行的架构以及它们的寄存器和物理地址大小。
Table 1 lists some popular architectures with their register and physical address sizes.
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