复接器有三种结构：串行、并行和树型。
There are three structures of multiplexer: serial, parallel and tree.
本课题主要是用FPGA实现一个数字复接器。
The subject is mainly accomplish a digital multiplexer by FPGA.
分析了综合业务环境下，具有漏桶控制的ATM复接器的性能。
The performance of a leaky-bucket-controlled ATM multiplexer for integrated services is analyzed.
IP复接器中对IP分组进行统计复接时需用存放队列的缓冲存储器。
It is necessary to use buffers for storing queues in IP multiplexers for statistical multiplexing.
对高速数据复接器进行了功能和时序仿真，通过分析输出波形验证了模型的可行性。
Then the functions of every part in the model are described respectively, functional and timing simulation are done to Multi-connect Encoder, the results are satisfactory.
介绍了采用多cpu系统和VL SI声码器为核心的语音数据复接器，分析了系统的工作原理和特点。
At last, this paper introduces a speech and data multiplexed based on Multi-CPU and VLSI vocoders. The operating principle and characteristics of the multiplexed are analyzed.
试验结果表明该复接器较好地实现了载荷数据的存储和复接功能的集成，并且功能灵活，硬件资源利用率小。
The simulation result shows that the multiplexer can integrate the functions of storing and multiplexing payload data flexibly with low rate of hardware resource utilization.
本文提出了基于FPGA技术实现数字复接系统的设计方案，并介绍了有代表性的较简单的四路同步复接器系统总体设计。
This paper puts forward a design method of digital multiplex system with FPGA , and introduces the whole system of four bits synchronous multiplexing .
本文提出了基于FPGA技术实现数字复接系统的设计方案，并介绍了有代表性的较简单的四路同步复接器系统总体设计。
This paper puts forward a design method of digital multiplex system with FPGA , and introduces the whole system of four bits synchronous multiplexing .
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