• 采用新型GTL总线收发器、时钟相位调节组合式匹配技术措施,解决总线设计驱动时序信号完整性问题

    The problems of backplane bus design, such as the driver, timing and signal integrate, have solved by using the GTL transceivers, phase adjustment of the clock and combined match techniques.

    youdao

  • 其中关键信号处理流程载波恢复时序恢复提供设计性能分析

    There are illustrations for designing and analysis for performance of important signal processing steps such as carrier recovery and timing recovery etc.

    youdao

  • 设计二进制树型拓扑结构传播统一系统时钟触发信号采用CPLD提供传感器间的精确时序同步

    A binary tree routing topology is designed for propagating the system clock and trigger signal and the accurate timing and synchronization between sensors are provided by CPLD.

    youdao

  • 设计一种可以降低CMOS图像传感器(CIS)数字噪声模拟信号影响时序

    A timing circuit is designed to reduce the effect of digital noise on analog signal in CMOS image sensor (CIS).

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  • 软件设计首先完成了PWM信号输出时序控制,并设计键盘输入功能模块、LED显示功能模块、电流电压信号采样功能模块,以及模糊神经算法学习软件功能模块。

    The software design implemented PWM output and sequence control module, keyboard input module, LED display module, current and voltage sampling module and fuzzy neural algorithm self study module.

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  • 分析仿真结果表明通过设计中运用信号完整性分析方法,本文设计的超高速数据采集系统满足工作时序要求

    The timing analysis and si simulation results show that the UHDA system can satisfy the system timing requirements with the help of the si analysis technique discussed in this thesis.

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  • 介绍了线CCD传感特性CCD驱动时序设计了一新颖基于嵌入式单片机的线阵CCD驱动电路、CCD输出模拟信号采集一体的溶液质量分数检测系统

    A novel linear CCD drive circuit based on embeded MCU is proposed, and liquid quality fraction detection system is elaborated, which is composed of CCD analog output signal acquisition.

    youdao

  • 利用FPGA完成复杂高速逻辑控制设计,将采集的图像根据视频信号原理进行裁剪存储SRAM

    FPGA is used to achieve the complex and high-speed logic control and the design of time sequence, with grabbed digital video signal cut and stored in SRAM, under the principles of the video signal.

    youdao

  • 利用FPGA完成复杂高速逻辑控制设计,将采集的图像根据视频信号原理进行裁剪存储SRAM

    FPGA is used to achieve the complex and high-speed logic control and the design of time sequence, with grabbed digital video signal cut and stored in SRAM, under the principles of the video signal.

    youdao

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