您还可以控制您想要终止的线程，中断的频率，甚重定义在中断以后必须为真的逻辑表达式。
You can control the thread on which you wish to stop, the frequency of suspension, and even define a Boolean expression that must be true before suspending.
在介绍了系统组成原理的基础上，详细讨论了采集部分的结构和FPGA 的控制逻辑，DSP响应中断实现数据转移和存储。
The principal of imaging system is introduced. Three parts is expounded in details, such as construction of acquisition part, control logic of FPGA, DSP control and Interrupt respond.
数字控制系统软件设计，包括DSP中断服务子程序和CPLD逻辑控制。
The design of digital control system includes DSP interrupt service routine and CPLD logic control.
数字控制系统软件设计，包括DSP中断服务子程序和CPLD逻辑控制。
The design of digital control system includes DSP interrupt service routine and CPLD logic control.
应用推荐