每一种硬件描述语言都采用了离散事件语法对系统进行建模。
Every kind of hardware description language adopted discrete event of system modeling of grammar.
本文介绍了一种通用硬件描述语言——UHDL及其编译器的设计与实现。
UHDL-A Universal Hardware Description Language and its compiler is presented in this paper.
采用VHDL硬件描述语言设计一种再生视频复合消隐信号的专用芯片。
In this paper, a kind of chip of video complex black signal is described with VHDL.
VHDL作为一种IEEE标准的电路硬件描述语言，正广泛地被电子技术人员使用。
VHDL are widely used by electronic technology professional as IEEE standard circuit hardware description language.
VHDL作为一种电路硬件描述语言，目前正在被越来越多的电子技术设计人员所应用。
As a hardware description language, VHDL has being used more and more by electronic circuit designers.
VHDL作为一种标准化的硬件描述语言用于描述数字系统的结构、行为、功能和接口。
The VHDL as a standardized hardware description language used to describe the struction of digital systems, behavior, function and interface.
VHDL作为一种通用的硬件描述语言，在电路设计中被广泛使用。
As a common kind of language for description of hardware, VHDL was once widely applied in circuit design.
VHDL是一种特殊的硬件描述语言。
本文利用VHDL硬件描述语言设计了一种SVPWM信号发生器，该信号发生器不仅成功实现了输入时间信号到SVPWM触发信号的转换，而且具有良好的抗干扰能力。
In this paper, a SVPWM signal generator is designed with VHDL. This signal generator can transform time signal into SVPWM trigger signal successfully with good anti-jamming capability.
利用CPLD复杂可编程逻辑器件，结合VHDL硬件描述语言，设计了一种线阵CCD驱动时序电路。
Use CPLD and VHDL together to design the time sequence driving circuit for a kind of linear CCD.
针对传统的最小频移键控(MSK)的调制解调方式，提出一种基于甚高速硬件描述语言(VHDL)的数字式MSK调制解调模型。
For the conventional modulation and demodulation of Minimum Frequency Shift Keying (MSK), the new models for modu - lation and demodulation on digital MSK based on VHDL are developed.
针对传统的最小频移键控(MSK)的调制解调方式，提出一种基于甚高速硬件描述语言(VHDL)的数字式MSK调制解调模型。
For the conventional modulation and demodulation of Minimum Frequency Shift Keying (MSK), the new models for modu - lation and demodulation on digital MSK based on VHDL are developed.
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