A method of designing asynchronous sequential circuits is presented.
本文提出异步时序电路的设计方法。
In design of pulsed asynchronous sequential circuits, it will solve for equations of clock and equations of state, on a symbolic Karnaugh map.
在异步时序电路设计中，它将时钟方程和状态方程的求解归在统一的符号卡诺图上进行。
It is rather difficult to analyze and make use of asynchronous sequential circuits, so the application of asynchronous sequential circuits is much narrower than synchronous ones.
对异步时序电路的分析和使用是一个比较困难的问题，所以，异步时序电路的实际应用范围远不如同步时序电路。
According to different sensitive transitions of flip-flops used in sequential circuits, design and analysis methods for asynchronous sequential circuits are proposed by using the combinatorial clock.
本文根据电路中采用的触发器的不同敏感沿，提出采用组合时钟的异步时序电路的设计和分析方法。
According to different sensitive transitions of flip-flops used in sequential circuits, design and analysis methods for asynchronous sequential circuits are proposed by using the combinatorial clock.
本文根据电路中采用的触发器的不同敏感沿，提出采用组合时钟的异步时序电路的设计和分析方法。
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