This paper firstly discusses three types of parallelism in LS SIMD array microprocessor, they are the concurrence of data, the pipelining and the operation in parallel.
首先介绍了L SSIMD阵列微处理器的三种并行性：数据并行、流水线并行和指令的并行执行。
To reduce the resource used by RSA algorithm, systolic array is accomplished by pipelining and the parameter is generated by software cooperated with hardware.
同时为了降低FPGA的资源占用，RSA算法采用流水线方式实现脉动阵列，并通过软硬件的协同合作完成算法中素数的判定生成算法参数。
To reduce the resource used by RSA algorithm, systolic array is accomplished by pipelining and the parameter is generated by software cooperated with hardware.
同时为了降低FPGA的资源占用，RSA算法采用流水线方式实现脉动阵列，并通过软硬件的协同合作完成算法中素数的判定生成算法参数。
应用推荐