提出了一种有效的验证集成电路版图的网络比较算法。
An efficient network comparison algorithm for layout verification of integrated circuits is presented.
软件的输入语言具有较强的描述集成电路版图的能力。
The input language of software has better ability to describe IC mask graph.
本文设计了模拟集成电路版图设计自动化工具的流程。
In this dissertation, we designed the architecture and the workflow of the analog VLSI layout automation tool.
提出了一种新的基于信号流分析的模拟电路版图综合方法。
This paper introduces a novel automatic physical synthesis methodology for analog circuits based on the signal-flow analysis.
集成电路版图提取为精确估计电路性能提供了可靠的手段。
VLSI layout circuit extraction provides a reliable tool for the estimation of circuit's performance.
最后我们给出了模拟集成电路版图设计的要点并完成了CID电路各部分的版图设计。
At last we introduce the principle of analog integrated circuit layout design and the layout of CID.
主要负责所有模拟电路版图的整体布局、静电保护设计和模块到顶层的集成设计和流片。
You will be responsible for all levels of analog mask layout from floor planning, ESD pad placement, block level layout up to top level integration tape out.
而集成电路的后端设计包括了版图设计和验证，它们不在本论文的讨论范围之内。
The back-end design includes layout design and verification, but they will not be discussed in this paper.
版图图像转移过程的失真，将影响产品的性能参数，直接降低了集成电路的成品率。
The distortion in pattern transferring process may influence functionality and performance of IC products and lower the production yield.
课题着重对这两个模块的电路结构以及版图结构进行了深入的研究和分析，并采用SPICE工具进行了模拟验证。
The paper has an emphatical discussion on the study and analysis of the circuit structure and layout structure of these two modules, and makes a lot of SPICE simulation and verification.
标准逻辑单元，存储电路设计及输入输出单元版图设计。
本文评述了现有模拟集成电路设计自动化技术的主要方法：拓扑综合，器件尺寸优化和版图综合技术。
Kernel subjects and achievements in topology selection, device sizing, and layout synthesis are reviewed in this paper.
集成电路工艺与版图。
提出了一种版图电路节点提取及节点压缩算法。
A general approach for node extraction of circuit layout and a node compaction method are given in this paper.
在版图的设计上，对输入级采用交叉耦合结构，减小由于工艺原理引起的MOS管匹配，从而减小电路的失调电压；
In layout design, the cross-couple structure is adopted in the input stage to minimize the MOSFET mismatch due to process, and consequently to lower the offset voltage in the circuits.
本文介绍了LT348的电路、版图和工艺设计。
This paper discusses circuit, layout and technology design of LT348.
对电路结构进行了仔细分析和优化设计，完成了电路设计和前仿真和部分版图设计。
Through carefully analyze and optimize the structure of circuit, now the circuits have been designed, pre-layout simulation and portion of layout design have been completed.
过滤器逻辑结构的模块化特别适宜用标准单元法来实现ASIC(专用集成电路)的版图设计。
The modularization of filter logical architecture is especially suitable for layout design of ASIC with standard cell.
采用这一方法，在设计好某一特定类型半规整电路的单元版图和整体结构后，可以比较方便快速地构造出其对应的版图编译器。
Using these methods, a given type of layout compiler can be easily and rapidly constructed when both the layout of leaf cells and the overall structure of the semi regular circuit are ready.
本文对芯片工作原理、系统架构设计、模块划分、前端模拟电路实现、版图设计等进行了详细分析。
In this thesis, we illustratre the theory of the chip, system design, partition of the modules, simulation and realization of analog circuit and layout design.
最后对子模块和整体电路的版图进行设计，流片后过对子模块和芯片整体测试。
And then designed the module and the whole circuit layout. After all measured modules and chips.
这次毕业设计从电路设计、性能仿真、版图设计、芯片整合测试这几个方面出发，设计出一款的音频处理芯片pms1345。
This paper design an audio processor through circuit designing, simulation, layout designing, chip testing. PMS1345 is an I2C bus controlled audio processing IC chip.
提出了一种新的MOS模拟单元电路的STACK版图自动生成方法。
This paper proposes a new technique to automatically generate STACK layout for MOS analog cell circuits.
之后对两个电路进行了版图设计，并已送交芯片制造厂商流片。
Layouts of two circuits are designed after simulation, and they have been delivered to the chip manufacturer and successfully fabricated.
通过完成电路中的各功能模块和焊盘的合理放置，对开关电源监控电路的版图进行了优化设计。
The layout design of the switch mode power supply is optimized through arranging function blocks and pads reasonably.
本论文给出了时钟恢复电路的基本原理以及采用PLL型时钟恢复电路的完整的电路设计、模拟结果和版图设计，以及将时钟恢复电路集成到光接收机后的测试结果。
The thesis presents basic principle of CRC and rounded circuit design, simulation results, layout design and testing results of a PLL type CRC, which is incorporated in a optic-fiber receiver chip.
从理论上阐述了微悬桥结构气体流速传感器的工作原理，设计了微悬桥的结构、工艺版图以及其电路系统。
The structure of micro cantilever bridge, the photolithographic mask and the circuit system of the sensor is designed.
其电路结构十分复杂，而且客户又对版图面积做了详细的规定。
Its circuit structure is very complex and its chip area is restricted severely by the client.
为提高版图电路提取效率，提出了一种新的层次式版图电路提取方法。
A new hierarchical approach for layout circuit extraction was presented to increase its efficiency.
为提高版图电路提取效率，提出了一种新的层次式版图电路提取方法。
A new hierarchical approach for layout circuit extraction was presented to increase its efficiency.
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