可重触发单mvbr NHZL时间稍长原始时钟频率的一半。
Retriggerable mono MVBR NHZL times out at slightly longer than half of original clock frequency.
由于反馈器件的限制，高速伪码不能采用单独依赖提高时钟频率的方法。
Because of the limits of feedback devices, high speed pseudo noise code generation cannot depend simply on the improvement of clock rate.
时钟树综合是芯片后端设计至关重要的一环，时钟偏差成为限制系统时钟频率的主要因素。
Clock Tree Synthesis is important in the backend-end design of chip design, and the clock skew has become the major part of constraints that limit system clock frequency.
时钟频率的提高，时序收敛性问题则变的越来越重要，时序的优化则成为设计的主要目标。
Higher work frequency makes timing convergence more and more important, timing optimization becomes the main objective of the design.
这将使NVIDIA的提高，最高的时钟频率的内存，从目前的1800兆赫到2200兆赫。
This will allow NVIDIA to raise the maximum clock frequency of memory from present 1800 MHz to 2200 MHz.
假设高信号使能，计数器每个时钟周期进行计数，PWM输出的频率为时钟频率的2次幂分频。
Suppose that Enable is high, the counter counts up every clock cycle, and the frequency of the PWM output is the clock frequency divided by 2 count bits.
该结构可利用现有存储器件在不增加时钟频率的情况下，提高存储器系统的容量和速度，同时降低成本。
The capacity and speed of the memory subsystem in this architecture can be improved using the existed memory devices while the cost can be downgraded without enhancement of the clock frequency.
随着时钟频率的不断提高，微处理器的性能受锁相环的影响越来越大，锁相环技术已经成为当代微处理器的核心技术之一。
The higher the clock frequency is, the more PLL influences the performance of microprocessors. PLL technique has been one of the core techniques in modern microprocessor design.
一个明显的解决方案是使用具有更快时钟频率的处理器，但是对于任何特定技术来讲都存在一个物理极限，时钟频率也有这样的极限。
An obvious solution is to use a processor with a faster clock rate, but for any given technology there exists a physical limit where the clock simply can't go any faster.
随着集成电路设计复杂性以及电路工作时钟频率的不断提高，互连与封装等寄生效应对电路的影响越来越大，产生了信号完整性问题。
At very high frequencies, interconnects and packages can only be characterized by a set of sampled data from measurements or electromagnetic simulations over the frequency of interests.
这台机器的时钟频率为1.6千兆赫。
这是因为进程执行现在需要跨总线协调，以一半的芯片时钟频率进行处理。
This is because process execution now needs to be coordinated across the bus, which operates at half the clock frequency of the chip.
同样通过降低电压和频率，C1E尝试比传统C1状态(只会停止时钟信号)提供更大的电能节省。
C1E tries to provide more power savings than the traditional C1 state (which only halts the clock signal) by also lowering the voltage and frequency.
受热的离子振动频率细小的差别，使得时钟有点不准确。
The heated ion vibrates at a slightly different frequency, making the clock a little less accurate.
直至最近，这种状况都是靠提高时钟频率达到的，在我有生之年，我已看到处理器主频从几千赫兹上升至几吉赫兹。
Up until recently, this was accomplished by accelerating the clock speed, which has leaped from kilohertz to gigahertz in my lifetime.
频率梳作为时钟的齿轮。
它可以显示很多内容，从CPU时钟频率和技术到RAM频率、BIOS和Windows版本、已安装软件的授权信息等等。
It displays everything from the CPU clock and technology to ram frequency, BIOS and Windows version, license information for installed programs and a lot more.
这些系列的处理器都拥有不同的时钟频率，或者说处理器处理交给它们的指令或任务的速度。
All of those come in varying clockspeeds, or how fast a chip will perform the instructions or tasks it's given.
诸如NIST-F1的仪器运用的原子信号是频率为数十亿赫兹的微波，新式时钟包括奥茨的都是运用频率快上百万倍的光。
While devices like the NIST-F1 use atomic signals of microwave frequency with billions of cycles per second, newer clocks, including Oates’, rely on light waves beating a million times faster.
但是时钟频率已经趋于饱和，现在计算机处理能力的提高主要靠增加处理器的数目以及提高在这些处理器之间分配任务的能力。
But computer clocks have plateaued and now, advances in computing power are coming from increases in the number of processors and improved abilities to distribute a problem across them.
要改变刷新频率，单击时钟图标，然后使用活动条指定0秒到300秒范围内的刷新率。
To change the refresh rate, click on the clock icon, and then use the slider to specify a refresh rate from 0 seconds to 300 seconds.
就像英特尔的超高时钟频率不能在提升了，双核内存也不能让微处理器的功能增大一倍。
Just like Intel's super high clock rates don't translate into proportionately more performance, doubling of cache size certainly doesn't double the performance of a microprocessor.
Compaq服务器已经使用了几年了，CPU的时钟频率较低。
The Compaq server was a few years older, and had lower clock speed CPUs.
我的问题是，我怎么知道输入时钟频率应该是多少？
My question is, how do I know what the input CLK frequency should be?
多年以来，英特尔通过提高越来越快的时钟频率(以MHz或者GHz计)，持续不断地改进了芯片的性能，但现在撞上了南墙。
For years, Intel has consistently improved the performance of its chips by making them run at higher and higher clock speeds (measured in MHz or GHz). But it has now hit a wall.
Windows 3.x需要8086/8088或者其它时钟频率超过10MHz的处理器。
Windows 3.x required an 8086/8088 processor or better that had a clock speed of up to 10MHz.
这使得能够控制复数流动的数据，甚至与相当的增加时钟频率。
This makes possible to control the plural flows of data even with the considerable increase for clock frequency.
这个基于PowerPCe300的32位多媒体SoC采用90纳米的低功耗CMOS技术制程，时钟频率400MHz。
Fabricated with 90-nanometer low-power CMOS technology, the 32-bit PowerPC e300-based multimedia SoC is clockable up to 400MHz.
固定频率源可以在在通讯系统和雷达系统中作为本机振荡器，也可以作为数字电路的基准时钟信号，因此得到了广泛的应用。
Single frequency source is usually used as local oscillator in communication system and radar system, also as a reference clock in digital circuits, so it is a extensive-applied technique.
不接受带有参考线频率的时钟的系统。
Systems with line frequency referred clocks not acceptable .
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