本文主要研究的是基于现场可编程逻辑阵列（FPGA）的数字上下变频技术的设计和实现。
This paper deals with the design and implementation of Digital Up Conversion and Digital Down Conversion based on the field-programmable gate array (FPGA).
该驱动板以现场可编程逻辑门阵列为DSP与编码器、脉冲命令和功率模块等电路之间的接口，以最新的智能功率模块(IPM)作为功率输出驱动芯片。
FPGA is used as interface between the DSP and the encoder, pulse command and power module. The latest intelligent power module (IPM) is used to provide the function of power stage.
在此基础上，采用高速数字信号处理器、大规模可编程逻辑门阵列和实时软件进行系统设计，完成了原理样机的研制。
On this basis, the principle prototype is developed with high speed digital signal processor (DSP), the huge reprogrammable logic gate arrays (FPGA) and real-time software.
在此基础上，采用高速数字信号处理器、大规模可编程逻辑门阵列和实时软件进行系统设计，完成了原理样机的研制。
On this basis, the principle prototype is developed with high speed digital signal processor (DSP), the huge reprogrammable logic gate arrays (FPGA) and real-time software.
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